The present invention relates to a Group-III nitride semiconductor light-emitting diode (LED) comprising an Si single crystal as a substrate. More specifically, the present invention relates to a high emission-intensity pn-heterojunction structure type Group-III nitride semiconductor light-emitting LED reduced in the absorption of emission attributable to a single crystal substrate, and also relates to a production method thereof.
A silicon (Si) single crystal is conventionally known as a representative semiconductor substrate material having an electric conductivity advantageous for the input/output of a device driving power source and exhibiting cleavability useful for cutting into individual elements. Recently, techniques for fabricating a Group-III nitride semiconductor light-emitting diode (LED) using a silicon single crystal (silicon) as a substrate have been disclosed (see, Electron. Lett., 33(23), pp. 1986-1987 (1997)).
In the Group-III nitride semiconductor nitride light-emitting diode, a light-emitting part having a pn-double heterojunction structure composed of aluminum gallium nitride (AlaGa1xe2x88x92aN, wherein 0xe2x89xa6axe2x89xa61) and gallium indium nitride (GaaIn1xe2x88x92aN, wherein 0xe2x89xa6axe2x89xa61) is provided (see, Appl. Phys. Lett., 72(4), pp. 415-417 (1998)).
The Si single crystal as a substrate has a lattice mismatch relationship with the Group-III nitride semiconductor constituting the light-emitting part. A large number of conventional techniques have been proposed to provide an intermediate layer between the single crystal substrate and the light-emitting part of LED to act as a buffer for the mismatch.
For example, a proposal has been made to provide an intermediate layer composed of aluminum nitride (AlN) for relieving the lattice mismatching and thereby obtaining a good quality light-emitting layer (see, Appl. Phys., supra, and JP-A-10-242586 (the term xe2x80x9cJP-Axe2x80x9d as used herein means an xe2x80x9cunexamined published Japanese patent applicationxe2x80x9d)).
Also, a technique of providing boron phosphide (BP) as a buffer layer on a zinc-blend type single crystal substrate such as gallium phosphide (GaP) and silicon is known (see, JP-A-2-275682, JP-A-2-288371 and JP-A-2-288388).
Furthermore, a technique of providing a metal film such as titanium (Ti) as an intermediate layer on an Si single crystal substrate is also proposed (see, JP-A-2000-261033).
In addition, a technique of disposing a titanium nitride (TiN) layer or a nitride layer of cobalt (Co) or the like as an intermediate layer on an Si single crystal substrate having a crystal plane of {111} is also disclosed (see, JP-A-2000-286449).
On the other hand, the band gap of Si single crystal is about 1.1 electron volts (unit: eV) (see, Iwao Teramoto, Handotai Device Gairon (Introduction of Semiconductor Device), page 28, Baihukan (May, 30, 1995)). This band gap is as small as half or less as compared, for example, with the transition energy corresponding to light emission in the blue band. Because of this, in the LED fabricated using an Si single crystal as the substrate, the light emission at the short wavelength region radiated from the light-emitting part of a Group-III nitride semiconductor is disadvantageously absorbed by the Si crystal substrate. In other words, absorption of emitted light by Si single crystal substrate cannot be avoided when the Group-III nitride semiconductor LED uses a Si as a substrate material and therefore, a high brightness Group-III nitride semiconductor LED can be hardly obtained.
For increasing the emission intensity of a Group-III nitride semiconductor LED using a Si substrate, a technique of providing a Bragg reflection (DBR) structure layer for reflecting the emitted light toward the outside, between the Si substrate and the light-emitting part has been disclosed (see, Mat. Res. Soc. Symp. Proc., Vol. 449 (1997), pp. 79-84). The DBR layer in conventional examples is composed of a periodic laminate structure where AlaGa1xe2x88x92aN (0xe2x89xa6axe2x89xa61) thin layers different in the aluminum composition ratio (=a) are repeatedly superposed on one another. The reflectance of emitted light from the DBR layer can be improved by increasing the lamination period unit but the lamination operation becomes disadvantageously more cumbersome.
Although a large number of proposals have been heretofore made to eliminate the substrate of LED and thereby increase the light emission intensity, mere removal of the substrate part from LED inevitably impairs the mechanical strength of LED. Therefore, a reasonable countermeasure is demanded. Under these circumstances, development of a method for obtaining a high emission intensity Group-III nitride semiconductor light-emitting LED having a sufficiently high mechanical strength by simpler and easier technical means has been demanded.
An object of the present invention is to develop a Group-III nitride semiconductor LED using an Si single crystal substrate, which is a high brightness Group-III nitride semiconductor LED obtained by technical means of eliminating the Si single crystal substrate from LED without losing the mechanical strength of LED and thereby reducing the absorption of emitted light attributable to the Si substrate.
More specifically, the present invention has overcome the above-described problems by developing the following embodiments:
[1] a Group-III nitride semiconductor light-emitting diode comprising an electrically conducting silicon (Si) single crystal substrate having on an upper surface thereof at least a light-emitting part having a pn-heterojunction structure composed of a Group-III nitride semiconductor, which light-emitting part is stacked via an intermediate layer composed of a metal or a semiconductor, the single crystal substrate having a back surface electrode on a back surface thereof, a surface electrode on an upper surface of the light-emitting part and a perforated part formed by eliminating the Si single crystal substrate in a region exclusive of the back surface electrode on the back surface of the single crystal substrate;
[2] the Group-III nitride semiconductor light-emitting diode as described in [1] above, wherein the back surface electrode on the silicon single crystal substrate comprises a continuous metal coating electrode;
[3] the Group-III nitride semiconductor light-emitting diode as described in [1] or [2] above, wherein the back surface electrode on the silicon single crystal substrate comprises a continuous metal coating electrode in an outer circumference of the perforated part;
[4] the Group-III nitride semiconductor light-emitting diode as described in [1] or [3] above, wherein the bottom surface of the perforated part is the above-described intermediate layer;
[5] the Group-III nitride semiconductor light-emitting diode as described in [4] above, wherein the intermediate layer comprises a Group III-V compound semiconductor film containing phosphorus (P);
[6] the Group-III nitride silicon semiconductor light-emitting diode as described in [4] or [5] above, wherein the intermediate layer comprises MN1xe2x88x92XPX wherein M represents a Group-III element other than boron, and X is in the range of 0 less than Xxe2x89xa61;
[7] the Group-III nitride semiconductor light-emitting diode as described in [4] or [5] above, wherein the intermediate layer comprises BXM1xe2x88x92XP wherein M represents a Group-III element other than boron, and X is in the range of 0 less than Xxe2x89xa61;
[8] the Group-III nitride semiconductor light-emitting diode as described in [7] above, wherein the intermediate layer has a concentration gradient of a Group-III constituent element or Group-V constituent element;
[9] a method for manufacturing a Group-III nitride semiconductor light-emitting diode, which comprises providing an intermediate layer having a low-temperature buffer layer and a high-temperature buffer layer on an electrically conducting Si single crystal substrate, providing a light-emitting part having a pn-heterojunction structure and including a lower clad layer, a light-emitting layer and an upper clad layer on the intermediate layer, perforating a back surface of the Si single crystal substrate into a hollow cylindrical form to obtain a perforated part and providing a first conduction-type electrode on the remaining back surface of the Si single crystal substrate and a second conduction-type electrode on the upper surface of the upper clad layer;
[10] the method for manufacturing a Group-III nitride semiconductor light-emitting diode as described in [9] above, which comprises growing the low-temperature layer at 250 to 550xc2x0 C. by MOCVD and the high-temperature layer at 750 to 1,200xc2x0 C. by MOCVD;
[11] a method for manufacturing a Group-III nitride semiconductor light-emitting diode, which comprises providing an intermediate layer consisting of a compositional gradient buffer layer on an electrically conducting silicon single crystal substrate, providing a light-emitting part having a pn-heterojunction structure and including a lower clad layer, a light-emitting layer and an upper clad layer on the intermediate layer, perforating the back surface of the Si single crystal substrate into a hollow cylindrical form to provide a perforated part before or after providing the light-emitting part, and providing a first conduction-type electrode on the remaining back surface of the Si single crystal substrate and a second conduction-type electrode on the upper surface of the upper clad layer;
[12] the method for manufacturing a Group-III nitride semiconductor light-emitting diode as described in any one of [9] to [11] above, wherein the crystal plane of the electrical conducting Si single crystal substrate is {111}; and
[13] the method for manufacturing a Group-III nitride semiconductor light-emitting diode as described in any one of [9] or [12] above, which further comprises grinding the back surface of the silicon single crystal substrate is ground to reduce the thickness of the substrate to 300 to 80 xcexcm and eliminating the single crystal substrate in the part excluding the region where an ohmic electrode is laid is eliminated to provide the perforated part after providing the intermediate layer on the surface of the silicon single crystal substrate.